摘要 |
PURPOSE:To elevate the yield and reliability with a less step in the multilayer interconnection by connecting wires arranged on a substrate to wires on the upper layers through a window provided in a layer insulation after it is burried flat with a plasma CVD film. CONSTITUTION:After a window is provided on an SiO2 2 on a substrate 1 with function regions formed thereon, for example, an Al layer is deposited entirely over the substrate in such a manner as to be connected thereto. With a resist pattern 11, the Al layer is etched to form a wiring 4 on the first layer. Then, a PSG film 10 is formed so thickly by plasma CVD that the wiring 4 can be burried flat. Projections 12 possible developed on the film 10 is removed by lifting off the PSG film 10 on the resist and a PSG film 5 is accumulated entirely thereon and subsequently, a window 6 to be connected to the wiring 4 is etched to form an Al wiring 7 on the upper layers. This can almost eliminate steps possibly produced with the formation of the wiring on the first layer, thereby hampering the development of disconnection, short-circuiting, or the like in the wiring 4 on the upper layers. |