发明名称 PREPARATION OF SEMICONDUCTOR DEVICE
摘要 PURPOSE:To shorten the manufacture process by a method wherein, when impurities each conductive in the opposite direction are introduced into the channel regions of depletion D type and enhancement E type FET's, either one of them is introduced without the use of a photoresist mask. CONSTITUTION:A P<+> guard ring 5 and a field oxide film 6a are formed on a P type Si substrate 1, and a P layer 8 is then formed by injecting ions through a gate oxide film 6b. After this, an N layer 7 is formed by injecting phosphorus ions, using a photoresist mask 4a. An opening is made in the oxide film 6b, which is followed by the formation of an oxide film 6c after poly-Si 10 is laid on the surface. Then gates 11, 11a and a connecting layer 19 are formed by etching the layers 6c and 10. Next, an oxide film 6d is used to cover the surface and phosphorus diffusion is provided so as to place sources 12, 12a and drains 13, 13a. After the resistance of the gate and the connecting layer is reduced, both are oxidized to produce an oxide film 6e and PSG14 under the film 6e. An opening is selectively made and poly-Si 10a are laid, where phosphorus diffusion is again provided. Al wiring 15 is provided and the layer 10 is etched. Next the surface is covered with an oxide film 6f and the pad of the wiring 15 is opened to complete the device, so that the manufacturing process can be made in a shorter time than before.
申请公布号 JPS577153(A) 申请公布日期 1982.01.14
申请号 JP19800081174 申请日期 1980.06.16
申请人 NIPPON ELECTRIC CO 发明人 SUZUKI KATSUHIKO
分类号 H01L21/8236;H01L27/088;H01L29/78 主分类号 H01L21/8236
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