| 发明名称 |
Field-effect transistors with micron and submicron gate lengths |
| 摘要 |
A method for forming ohmic contacts of gold and germanium gold on a gallium arsenide substrate in which a layer of silicon dioxide is placed over the gold in the contact area prior to sinter alloying to improve wetting and reduce contact resistance.
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| 申请公布号 |
US4310570(A) |
申请公布日期 |
1982.01.12 |
| 申请号 |
US19800145625 |
申请日期 |
1980.05.01 |
| 申请人 |
EATON CORPORATION |
发明人 |
CALVIELLO, JOSEPH A. |
| 分类号 |
H01L21/24;H01L21/285;H01L21/338;H01L29/45;H01L29/78;H01L29/80;H01L29/812;(IPC1-7):H01L21/28 |
主分类号 |
H01L21/24 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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