发明名称 DEMODULATING DEVICE OF DIGITAL SIGNAL
摘要 <p>PURPOSE:To avoid a mistaken correction, by making effective at least either one of the means to detect a shift of phase and the means to correct the shift of phase for a prescribed period. CONSTITUTION:A reproduced signal is supplied from an input terminal 11, and an nF clock [a clock having (n) times as much as the bit frequency of the input data] is produced by a PLL12. Then the reference clock having a frequency equal to the data frequency is produced by a clock generator 14. With this reference clock, the reproduced signal is decoded to the original data through a decoder 13. Furthermore, the information on the shift of phase sent from a detector 15 for shift of clock phase is supplied to the generator 14 via a gate 16. And a control signal is supplied to the gate 16 through an input terminal 17 to open the gate for a certain time to the reproduced data series and to close the gate otherwise.</p>
申请公布号 JPS574631(A) 申请公布日期 1982.01.11
申请号 JP19800077857 申请日期 1980.06.11
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 OGURA ICHIROU;TAKEMURA YOSHIYA;YAMAMITSU CHIYOUJIYUUROU;MOTOTANI KUNIHIKO;IDE AKIFUMI
分类号 H04L1/00;H04L7/00;H04L7/027;H04L7/033;H04L25/49 主分类号 H04L1/00
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