| 摘要 |
PURPOSE:To eliminate needless key operations to shorten the debug processing time considerably, by interrupting the execution for a prescribed instruction temporarily and by providing a means which determines this execution interrupt time. CONSTITUTION:The number of execution steps and the interrupt time are set in an execution instruction number register 7 and an interrupt time set register 12. When instructions are executed, a CPU executes a prescribed processing on a basis of instruction data read out from a ROM and transmits the result to an output part 3. The value of an instruction execution number counter 5 is compared with contents set in the register 7 by a comparator 6; and if they coincide with each other, the counter 5 is reset. Further, this coincidence signal is inputted to a stop signal generating part 8 and an interrupt time counter 10 to start the count operation. The value of the time counter 10 is compared with the value of the register 12; and if they coincide with each other, a coincidence signal is outputted from a comparing part 11, and the CPU stop signal of a control part 8 is released to return the CPU to the execution state. |
