发明名称 |
INSULATED GATE TYPE FIELD EFFECT TRANSISTOR |
摘要 |
PURPOSE:To enhance the withstand voltage of a field effect transistor by eliminating the occurrence of the concentration of an electric field in the V-shaped semiconductor region. CONSTITUTION:When a control voltage for setting a conductive layer 49 side at positive is applied between a conductive layer 54 as a source conductive layer and a conductive layer 49 as a gate conductive layer in the state that a power source for setting a conductive layer 53 side at positive is connected between the layer 54 and the layer 53 as a drain conductive layer, an N-type inversion layer is formed on the surface of the region under an insulating layer 48 of a semiconductor region 43 as a channel forming region, and a current will flow from the layer 53 side to the layer 54 side. When a control voltage for setting the layer 49 side having a value lower than the minimum value of the control voltage obtaining ON function at positive or a control voltage for setting the layer 49 side at negative is applied between the layers 54 and 49, a current flowing through the layers 54 and 53 is interrupted. |
申请公布号 |
JPS572575(A) |
申请公布日期 |
1982.01.07 |
申请号 |
JP19800076376 |
申请日期 |
1980.06.06 |
申请人 |
NIPPON TELEGRAPH & TELEPHONE;NIPPON ELECTRIC CO |
发明人 |
KATOU KUNIHARU;NAGANO HITOSHI;SHIMADA YUUKI;HIDESHIMA KENJI;HANEDA HISASHI |
分类号 |
H01L21/76;H01L29/417;H01L29/78 |
主分类号 |
H01L21/76 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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