发明名称 COMBINED INTEGRARED CIRCUIT DEVICE
摘要 PURPOSE:To increase both producibility and reliability for the subject device by a method wherein a power transistor is installed on and connected to the lead-inserted metal block having two defects and they are soldered on the pattern of a circuit substrate together with other parts. CONSTITUTION:The chip 34f on the power transistor 34 is installed on the upper surface of the metal block 34b having two defects 34a. On each defect 34a, a penetrated hole 34c is provided, a lead 34e is inserted and fixed through the intermediary of a lead 34e, and the electrode of the chip 34f is connected to the lead end by a wire 34g. The element 34 which was formed in one body is placed on the conductor pattern 32, provided on the substrate 30 consisting of an Al, for example, through the intermediary of an insulating layer 34, and is assembled by connecting with solder 33. Through these procedures, the producibility and reliability of the circuit device containing the power transistor can be improved.
申请公布号 JPS571237(A) 申请公布日期 1982.01.06
申请号 JP19800074572 申请日期 1980.06.03
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 NAGASHIMA KENJI;TANAKA MASATAKA
分类号 H05K1/18;H01L21/60;H05K1/05;H05K3/34 主分类号 H05K1/18
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