发明名称 Memory driving method
摘要 In a memory array of memory cells each having at least a gate, a substrate, a source and a drain, a writing operation is effected when the substrate and the source and drain are at the same potential and when a potential difference Vp exists between the potential of the substrate and the source and drain and that at the gate. The stored contents are erased when a potential difference Vp exists between the gate and the substrate. The stored condition is prevented from changing when a potential difference Vp exists between the substrate and the gate and when a potential difference Vwd exists between the substrate and the source and drain. When such a memory array is partially erased, cells not to be erased are sequentially driven by applying a voltage Vwd between the source and drain and the substrate of the cell, applying a voltage Vp between the gate and the substrate of the cell, and applying the same potential to the substrate and the gate of the cell.
申请公布号 US4308596(A) 申请公布日期 1981.12.29
申请号 US19790081890 申请日期 1979.10.04
申请人 HITACHI, LTD. 发明人 TAKAI, ATSUSHI;KITA, YUZO;HAGIWARA, YOSHIMUNE;SAWASE, TERUMI;HAGIWARA, TAKAAKI
分类号 G11C17/00;G11C16/02;G11C16/04;G11C16/08;G11C16/10;G11C16/26;(IPC1-7):G11C11/40;G11C13/00 主分类号 G11C17/00
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