发明名称 |
RANGE COUNT AND MAIN MEMORY ADDRESS ACCOUNTING SYSTEM |
摘要 |
<p>RANGE COUNT AND MAIN MEMORY ADDRESS ACCOUNTING SYSTEM In a peripheral controller of a data processing system having a plurality of system units electrically coupled to a common communication bus for asynchronous intercommunication, an array of counters responsive to both hardware and firmware are connected in a manner to form a serial control data path. Prior to a data transfer, a serial data stream including an offset range count, a range count and a main memory address is shifted through the counters under firmware control. During a data transfer, the firmware enables the hardware control to increment the memory address and decrement the range count to accommodate the higher data transfer rates characteristic of hardware control.</p> |
申请公布号 |
CA1115424(A) |
申请公布日期 |
1981.12.29 |
申请号 |
CA19780304098 |
申请日期 |
1978.05.25 |
申请人 |
HONEYWELL INFORMATION SYSTEMS INC. |
发明人 |
GETSON, EDWARD F., JR.;KELLEY, JOHN H.;MCLAUGHLIN, ALBERT T.;RATHBUN, DONALD J. |
分类号 |
G06F5/10;G06F5/14;G06F13/12;G06F13/28;(IPC1-7):06F9/30 |
主分类号 |
G06F5/10 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|