| 摘要 |
PURPOSE:To realize a division of duty ratio 1, by giving an alternate switching of the input signal frequency according to the state of the n-th output terminal of an n- stage shift register. CONSTITUTION:Frequencies f and -f are applied to one input terminal of AND circuits 2 and 3 each; and outputs Qn and -Qn of a shift register 1 are applied to the other input terminal of the circuit 2. Accordingly, the frequencies f and -f are switched with every change of the state of outputs Qn and -Qn to give a shift to the contents of the register 1 with a shift of half cycle given with every switching. Thus the contents of the register 1 are reset to the original state after the 2n-1 cycle to realize a division of 1/odd-number. |
