| 摘要 |
PURPOSE:To reduce the number of wirings in a data holding circuit for multiple inputs and to improve reliability by directly controlling a transfer gate for preventing the collision of input data and data for feedback by means of clocks. CONSTITUTION:While a transfer gate 13 is on, the transfer gate 17 of a feedback circuit remains off because a basic clock CKL is an L level. When the signal CLK goes to the H level and WE1 to the L level, the gate 13 goes off, and in turn the transfer gate 17 goes on, thereby holding the input data D1. In this case, even if control signals 1, 2 do not go the H level, the basic clock CLK is being normally generated, hence this results in that the gate 17 repeats on and off. |
