发明名称 DATA TRANSFER CONTROL SYSTEM
摘要 PURPOSE:To easily perform addition and separation of control information by providing address registers separating specific parts within a data transfer control device for the data transferred between upper devices and lower devices within the control device. CONSTITUTION:In the data buffer of a data transfer control device, an address register 2 is used for data transfer to and from a main storage device which is an upper device, an address register 4 is used for transfer with lower devices, for example, a magnetic disc device, and an address register 3 for access of the bufer from the control device and for the access from lower devices. In the data transfer from the upper devices to the lower devices, first data are successively stored in the storage positions of a buffer memory 1 designated by the address register 2. The data are then fetched from the positions designated by the register 4 by the request from the lower devices. If the control information that the control device requires is included in said data, the address indicating said byte position is set in the register 3 and is fetched from the buffer area.
申请公布号 JPS56168253(A) 申请公布日期 1981.12.24
申请号 JP19800072071 申请日期 1980.05.29
申请人 FUJITSU LTD 发明人 SUGAYA SEIICHI
分类号 G06F13/12;G06F5/06;G06F5/10;G06F13/38 主分类号 G06F13/12
代理机构 代理人
主权项
地址