| 摘要 |
PURPOSE:To realize optimum control and realize the high-speed processing and shorten the check time, by determining the type of memory access by the data length and two bits from the least significant digit of the address of data in a main memory. CONSTITUTION:The data length is stored in a register RG9 through a data selector DS18, and two bits from the least significant digit of the address of data in a main memory 5 are stored in an RG10 through a DS19. Contents of RG9 and RG10 are inputted to the first memory 11, and here, the type of memory access is determined. The type of memory access is temporarily held in an RG14 and is sent to a control bus 1 through a gate 13. In this case, an inhibition signal is inputted to a gate 8, and a microprogram from a control storage part 7 is not sent out. When a certain addressing is performed, contents of RGs 9 and 10 are inputted to the second memory 12, and here, the numeric data which updates the address to read out the next data from the memory 5 is determined. |
