发明名称 INFORMATION PROCESSOR
摘要 PURPOSE:To increase the data transfer speed and to reduce the processing time, by constituting that a common memory can be connected to any of m,n bit-bus, and separating the memory from the bus while the processor do not execute data transfer with the memory. CONSTITUTION:On a 16 bit-bus 230 and a 8 bit-bus 240, common memories 250, 260 which can use processors 210,220 commonly are provided so that they can be connected to both the buses. When a 16 bit-processor 210 uses the common memory 250 through utilizing the bus 230, and when a 8 bit-processor 220 accesses the common memory 260 through utilizing the bus 240, the processing of respective processor can be executed in parallel at the same time without any delay in the access by connecting the memory 250 to the bus 230 and the memory 260 to the bus 240.
申请公布号 JPS56166568(A) 申请公布日期 1981.12.21
申请号 JP19800070289 申请日期 1980.05.27
申请人 NIPPON ELECTRIC CO 发明人 SATOU YOSHIKUNI
分类号 G06F15/16;G06F9/52;G06F12/04;G06F12/06;G06F13/16;G06F13/36;G06F15/167;G06F15/177 主分类号 G06F15/16
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