发明名称 TRANSISTORE PLANARE INVERSO
摘要 1494149 Integrated circuits SIEMENS AG 5 Dec 1975 [19 Feb 1975] 49938/75 Heading H1K In an integrated circuit comprising an inversely operated transistor as shown in Fig. 2, of which the zone conductivity types may be reversed, the emitter zone consists essentially of a buried zone 3 and a similarly heavily doped zone 15 of the same conductivity type extending upwards through epitaxial layer 2 towards base zone 6. The structure shown, which is an I<SP>2</SP>L transistor, the base of which is fed with current by injector zone 8, may be formed by first implanting or diffusing a slow diffusing impurity, e.g. Sb or As, into an area 3 of P-type substrate 1, similarly introducing a faster diffusing impurity, e.g. As or P, or a higher concentration of the same impurity into area 15 within zone 3, then epitaxially depositing layer 2 and forming by diffusion or implantation first emitter connection zone 4, then base zone 6 and injector zone 8 and finally collector zone 7, the impurities in areas 3 and 15 diffusing further in these later steps to produce the pedestal emitter structure shown. The provision of zone 15 improves the emitter efficiency and reduces emitter capacitance.
申请公布号 IT1055197(B) 申请公布日期 1981.12.21
申请号 IT19760020065 申请日期 1976.02.11
申请人 SIEMENS AG 发明人
分类号 H01L21/8226;H01L21/22;H01L21/331;H01L21/74;H01L23/528;H01L27/082;H01L29/73;H01L29/732 主分类号 H01L21/8226
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