| 摘要 |
PURPOSE:To reduce the space occupied by a delay element in a digital signal transmitting device, by securing a coincidence of phase between the data signal and the clock signal without using a delay element to the data signal. CONSTITUTION:The clock signal applied to a terminal 101 receives a change of phase by a phase shifter 102 to be delivered to a terminal 104. The output signal of the shifter 102 receives a time delay by a delay element 105 to be delivered to a terminal 107. This delayed clock signal receives a comparison of phase with the clock signal of the terminal 101 through a phase comparator 103, and the phase error signal is applied to a low pass filter 106 to be eliminated for the noise component. Such clock signal is then applied to the phase shift extent control signal terminal of the shifter 102. Thus the phase shift extent is controlled toward the direction where the above-mentioned phase error signal is reduced. |
