| 摘要 |
PURPOSE:To realize a ime-division use of an external terminal and increase the number of transmissive signals, by supplying in common plural clocks of different kinds from a timing control part which is connected in common to plural large- scale integrated circuits. CONSTITUTION:Connection is secured between large-scale is integrated circuits LSI1 and LSI2 via plural data buses DB1, between LSI2 and LSI3 via plural data buses DB2, and between LSI3 and LSI1 plus LSI1-LSI3 via plural data buses DB3 and DB4, respectively. The LSI1-LSI3 to which two different kinds of clocks CK1 and CK2 are applied in common can produce four different kinds of timing signals inside these circuits through a simple constitution of circuit. As a result, an external terminal can be used for a transfer of four different kinds of data. An output circuit OUT1 consists of four AND gates AG1-AG4 which sample the data D1-D4 with different timing signals T1-T4, an OR gate OG and a buffer BUF1. |
