| 摘要 |
The method includes the steps of depositing a silicon nitride film (2) and a 1st silicon layer (3) on a 1st insulating film (1) to etch the layer (3) to form a rectangular hole (10) in the layer (3), forming a 2nd insulating film (4) thereon to form a film pattern (4A) to remove the layer (3), depositing and etching a 2nd silicon layer (5) thereon to form a 2nd silicon spacer (5A) on the side wall of the pattern (4A), etching the spacer (5A) to form a spacer pattern (5B), forming a gate insulating film (6) and a 3rd silicon layer (7) on the inner and outer side walls of the pattern (5B) to form a gate electrode (7A), and forming source and drain regions (8A,8B), thereby forming an effective channel length in a narrow transistor area.
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