发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE:To simplify manufacturing process and improve characteristics controllability and reporducibility, in an E/D type gate circuit to be provided on a semi-insulated GaAs substrate, by making impurity concentration of a D-type channel higher than concentration of an E-type channel. CONSTITUTION:Surface of a semi-insulated GaAs substrate 1 is covered with an insulation film 12, a resist mask 13 on which an E-type channel region is bored is provided, and ion is injected into an N<-> layer 14. And then, another resist mask 15 is provided, and an N<+> layer is injected to E-type FET source drain regions 161 and 162 and D-type FET forming region 163. After removing a resist 15, providing hole on the source drain region of the insulation film 12 and forming wiring layers 171-173 of such a metal as an Au-Ge alloy, a hole is provided on the gate region and aluminum schottky gates 181 and 182 are provided. As a circuit consisting of thus manufactured E-type FET Q11 and Dk-type FET Q12 does not require etching process, etc., manufacturing process can be simplified and fluctuation of characteristics can be minimized.
申请公布号 JPS56164567(A) 申请公布日期 1981.12.17
申请号 JP19800068079 申请日期 1980.05.22
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 SHIMIZU SHIYOUICHI
分类号 H01L29/80;H01L21/8236;H01L27/088;H01L27/095 主分类号 H01L29/80
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