| 摘要 |
PURPOSE:To make flexible interruption control at system operation, by changing the priority of each module with the addition of a simple logical circuit, through the comparison between the address inherent to each module connected to bus lines and the address from a control logical section. CONSTITUTION:A plurality of modules 14-16 are connected to a bus line 11, a bus line usage request line 12 is connected to the modules 14-16, and a bus line control logical section 10 is connected to the request line 12. The logical section 10 is connected to the line 11 and a bus line usage request reception line 13 is connected to the modules 14-16. Further, an address signal 8 and a selection signal 5 of the modules 14-16 are outputted from the control section 10, and they are compares with the inherent address of a module inherent address 3 at the comparison circuit 6 of the module 14. When the result is in dissidence a nonselection detecting signal 7 is fed to a gate 4 to renew the information of a counter 2, the priority renewed is fed to a priority display line 9 and the priority is changed. |
