| 摘要 |
A non-volatile semiconductor memory comprises a plurality of memory cells each composed of a floating gate field effect transistor, and an erasing circuit connected to a common source line connected to a source electrode of each of the memory cells. The erasing circuit includes first and second field effect transistors each of which has a source connected to an erasing voltage and a drain connected to the common source line. The first field effect transistor responds to a given erase signal to apply the erasing voltage to the common source line for the purpose of erasing date stored in the memory cells. The erasing circuit includes a control circuit for turning on the second field effect transistor when a voltage on the common source line becomes higher than a reference voltage, so that the erasing voltage is supplied through the first and second field effect transistor to the common source line.
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