发明名称 DATA TRANSFER SYSTEM
摘要 <p>PURPOSE:To use a direct memory controller, which is used before extension, continuously when plural memory devices are extended, by specifying areas requiring access in respective memory devices and by adding a simple-constitution switching device. CONSTITUTION:A processor 1 and a direct memory access controller 2 are connected by a data bus 5 and the 0th - the 13th digit lines 61 as an address bus. These digit lines 61, the 14th digit line 62, and the 15th digit line 63 are distinguished from other digit lines and are connected to memory devices 31-34 having specific areas 311-341 requiring access. A control line 70 from the processor 1 is connected to devices 31-34 through a register 7 to designate respective devices 31-34. The 0th - the 13th digits of the memory address signal from the controller 2 are connected to digit lines 61 directly, and two bits of the 14th - the 15th digits are connected to digit lines 62 and 63 or a decoder 8 through a switching circuit 11. Thus, the controller is used continuously when devices 32-34 are extended.</p>
申请公布号 JPS56162165(A) 申请公布日期 1981.12.12
申请号 JP19800066187 申请日期 1980.05.19
申请人 FUJITSU LTD 发明人 KITAMURA AKIZOU;IWASAKI KOUICHI;SATOU HIROAKI;NISHIDA MITSUO
分类号 G06F12/06;G06F13/28;G06F15/78 主分类号 G06F12/06
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