发明名称 SAMPLING CIRCUIT
摘要 PURPOSE:To obtain a compensation output by giving a compensation to the sampled n-th sampling output based on a prescribed arithmetic formula and thus to obtain a sampling output almost equal to the original input signal waveform by giving a compensation to the phase distortion. CONSTITUTION:An analog input signal to be sampled is sampled through a sample holding circuit 20 at a prescribed time interval. This sampling output is applied to an arithmetic circuit 21 that forms a compensating circuit to be delivered based on a prescribed arithmetic formula. This arithmetic output Yn is led to the storage circuit 23 via a switch 22 to be stored until the next closing time of the switch 22. This storage output is turned into an input of the circuit 21 to be used for a compensation of the sampling output. Thus an arithmetic formula for compensation is shown as Yn=K(Xn-Yn-1)+Xn, where Xn is the n-th sample holding output, Yn is the arithmetic output, Yn-1 is the output of the circuit 23 corresponding to the (n-1)th sample holding, respectively.
申请公布号 JPS56160135(A) 申请公布日期 1981.12.09
申请号 JP19800063552 申请日期 1980.05.14
申请人 PIONEER ELECTRONIC CORP 发明人 SHIBAZAKI SHIGERU;ANDOU SHIGEO
分类号 H03K7/02;(IPC1-7):03K7/02 主分类号 H03K7/02
代理机构 代理人
主权项
地址