| 摘要 |
PURPOSE:To commonly use parts and prevent distortion in reproduced waveform, by connecting a sampling converter to the pre-stage or pre-and post-stage of a low-pass filter and connecting digital delaying circuits which correct delays in processing time produced by connected sampling filters. CONSTITUTION:A sampling converter 23 which converts the clock frequency (fs) of digital signals inputted through a switch 4 into a clock frequency which is lower than the clock frequency (fs) is connected to the pre-stage of a low-pass filter 8. Then AD converters 24 and 25 which convert the digital signals into analog signals by means of low sampling signals are connected to the post-stage of the filter 8. Delaying circuits 26-29 are respectively connected to the pre- stages of the AD converters 10, 11, 24, and 25. Therefore, the scale of the hardware can be made smaller and distortion in reproduced waveform can be prevented. |
