发明名称 MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To obtain a minute isolation layer of the semiconductor integrated circuit by a method wherein BSG films are provided selectively, an epitaxial layer is accumulated thereon, the half thickness of the polycrystalline Si layers are removed to form grooves, the side walls of the grooves are converted into SiO2 films by heating, and N<+> type layers are formed simultaneously under the BSG films. CONSTITUTION:The BSG films 22 are provided selectively on a P type Si substrate 20 having N<+> type buried layers 21, and when an N type epitaxial layer 23 is accumulated thereon, the polycrystalline Si layers 24 are formed on the BSG films. An SiO2 film 25 ane an Si3N4 film 26 are accumulated thereon, openings are formed in the Si3N4 film 26 and the SiO2 film 25 by CF4 plasma applying a resist mask 27 to etch the half thickness of the polycrystalline Si layer 24 to form the grooves 28. The surface is covered with an Si3N4 film 29 and sputter etching is performed in the vertical direction using CF4 gas to remain the Si3N4 films on the side walls. Ar ions are implanted to accelerate the speed of oxidation of the polycrystalline Si layers 24', and wet oxidation is performed to convert thereof into the SiO2 layers 30. At this time, P<+> layers 31 are formed directly under the BSG films 22. The Si3N4 films 26 are removed, and various kind of IC's are formed in the epitaxial layer 23. By this constitution, the area of the isolation layer can be made as small, and density of integration can be enhanced because of the flatness of the surface.
申请公布号 JPS56158446(A) 申请公布日期 1981.12.07
申请号 JP19800063247 申请日期 1980.05.12
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 YONEDA TADANAKA
分类号 H01L21/76;H01L21/316;H01L21/762 主分类号 H01L21/76
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