发明名称 DATA PROCESSOR
摘要 PURPOSE:To allow the contents of the cash memory and main memory of a multiprocessor system to coincide at all times by detecting the overflow of an address stack register thereby invalidating the entire contents of the cash memory. CONSTITUTION:The contents of the main memory 23 and cash memory 1 of the multiprocessor system are so processed as to coincide at all times unless the memory 23 is rewritten by other device based on the readout request via an arithmetic part 4 when they do not coincide. When a stack register 6 gets full with the transferred addresses during this processing and overflows, this is detected 7, and a cash memory unsable signal is transmitted to a cash memory control part 5 through a cash memory invalidation control part 8, thereby invalidating the entire part of the memory 1. This obviates the occurrence of dissidence of the contents of the memories 1, 2 owing to the annhilation of the unprocessed addresses.
申请公布号 JPS56156980(A) 申请公布日期 1981.12.03
申请号 JP19800059087 申请日期 1980.05.01
申请人 NIPPON ELECTRIC CO 发明人 MATSUMOTO HIROSHI
分类号 G06F12/08 主分类号 G06F12/08
代理机构 代理人
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