发明名称 SIGMA - DELTA modulator-controlled phase-locked-loop circuit
摘要 A SIGMA DELTA modulator-controlled, phase-locked-loop circuit, and an associated method, generates a frequency-regulated signal which does not exhibit undesired tones. Dithering signals are generated and are provided to a SIGMA DELTA modulator. The SIGMA DELTA modulator forms a division-factor control signal used to control the division factor of a frequency divider forming a portion of the PLL circuit. The dithering signals applied to the SIGMA DELTA modulator reduce the likelihood that the SIGMA DELTA modulator shall enter a limit cycle and generate repetitive output signals.
申请公布号 US5986512(A) 申请公布日期 1999.11.16
申请号 US19970989864 申请日期 1997.12.12
申请人 TELEFONAKTIEBOLAGET L M ERICSSON (PUBL) 发明人 ERIKSSON, HAAKAN BENGT
分类号 H03C3/00;H03C3/09;H03L7/183;H03L7/197;H03M7/00;H04B14/06;H04L27/12;H04L27/20;(IPC1-7):H03L7/197;H03K23/68 主分类号 H03C3/00
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