发明名称 LINEAR FEEDBACK SHIFT REGISTER
摘要 PURPOSE:To generate a test pattern suitable for respective blocks by providing a control register on a linear feedback shift register (LFSR) which is one of the combined test circuit of an LSI and obtaining the degree of freedom. CONSTITUTION:A flip flop of a D type (DF/F)1 is initialized and next, control data from a data input line is serial-transferred to respective control registers 14 by a clock 21. Since the register 14 is constituted of the DF/F1, every time the clock 21 is inputted to a CLK, the data of a terminal D is presented in a terminal Q, among the (n) pieces of registers, the data moves from left to right and functions as a shift register. Namely, input data are serially inputted from input lines 15 and 16. Thus, a value is set to the respective DF/F1s of the (n) pieces of registers 14, the values of the respective DF/F1s are changed according to the input data and the bit length of an LFSR and the position of an output terminal can be freely changed.
申请公布号 JPS63281300(A) 申请公布日期 1988.11.17
申请号 JP19870115897 申请日期 1987.05.14
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 YANO TAKAO;OKAMOTO HIDETAKA
分类号 G11C19/00 主分类号 G11C19/00
代理机构 代理人
主权项
地址