| 摘要 |
PURPOSE:To synchronize the counting operation of a counter circuit with a repetitive signal accurately by resetting the counting operation after putting an inhibit pulse and reset pulse in phase when both the pulses become out of phase. CONSTITUTION:Counter correcting circuit 17 receives pulse P1 which synchronizes with horizontal synchronizing signal SH from AFC circuit 13 and outputs reset pulse P2. Simultaneously, circuit 17, when inhibition pulse P4 and pulse P2 are in phase with each other, checks the generation position of pulse P2 in evey horizontal scanning period and then integrates the detection result to detect where pulse P2 are generated most frequently. Once this position is detected, counter circuit 15 is reset on the basis of the position. When pulses P4 and P2 become out of phase, on the other hand, circuit 17 supplies an integrating-operation stop signal to ROM circuit 16. Then, pulses P4 and P2 are put in phase to add successively pulses P2. |
