| 摘要 |
PURPOSE:To convert the sequential circuit into a combinatorial circuit, by disconnecting feedback loop FBL in the sequential circuit having FBL. CONSTITUTION:When the control signal of signal input line 19 for combinatorial circuit is 1 logical value, propagating gates 20 and 21 are connected, and propagating gates 14-17 are disconnected or connected in accordance with logical values of clock signals phi1 and phi2. Under this state, the circuit performs the FF operation as the sequential circuit, and the same data as data input line 1 is outputted to data output line 18. When the control signal of input line 19 is 0 logical value, gates 20 and 21 are disconnected, and the FBL of signal lines 4, 5 and 3 and signal lines 8, 7 and 6 is disconnected, and logical values of control signal lines 22 and 23 for combinatorial circuit are always 1 due to the logical condition of NAND gates 26 and 27 independently of logical values of signals phi1 and phi2, and gates 14 and 17 are always connected, and the same data as input line 1 is outputted to output line 18, thus making the FF into a combinatorial circuit. |
