发明名称 ARITHMETIC PROCESSOR
摘要 <p>PURPOSE:To reduce the power consumption of a device extremely by turning off CPU without supplying a clock pulse to CPU by FF except in the arithmetic processing of CPU. CONSTITUTION:In key switch operation, the key signal that corresponds to an operated key switch is inputted to CPU21, which performs the arithmetic processing corresponding to the key input to output the arithmetic result. On this arithmetic processing, CPU21 outputs a high-level end signal. Consequently, flip-flop F2 resets to stop the supply of clock pulses phi1 and phi2 to CPU21. Every time a key switch is operated, F2 sets to supply pulses phi1 and phi2 to CPU21, which performs arithmetic processing and on completing the arithmetic processing, F2 resets to stop the supply of pulses phi1 and phi2 to CPU21.</p>
申请公布号 JPS56152020(A) 申请公布日期 1981.11.25
申请号 JP19800054047 申请日期 1980.04.23
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 OGAWA YOSHISHIGE
分类号 H02J1/00;G06F1/04;G06F1/32;G06F15/02 主分类号 H02J1/00
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