SEMICONDUCTOR MEMORY DEVICE.

摘要

PCT No. PCT/JP80/00143 Sec. 371 Date Feb. 25, 1981 Sec. 102(e) Date Feb. 20, 1981 PCT Filed Jun. 24, 1980 PCT Pub. No. WO81/00027 PCT Pub. Date Jan. 8, 1981.A semiconductor memory device wherein a redundancy memory cell array incorporated with main memory cell matrixes is disclosed. Memory cells of the main memory cell matrixes are selected by first and third decoders while memory cells of the redundancy memory cell array are selected by second and third decoders. When the redundancy memory cell array is selected by the second decoder, the transmission of a clock signal to the first decoders is stopped by a switching circuit.