发明名称 DATA SET CIRCUIT FOR INTEGRATED LOGICAL OPERATION CIRCUIT
摘要 PURPOSE:To reduce the number of IC input terminals for data set greatly, by providing two counters synchronized with each other and decoders for them on the inside and outside the IC and by providing a memory element on the inside of the IC. CONSTITUTION:Counters 9 and 14 are reset first by reset pulse 19, and next, counter 9 and 14 count numbers from 0 to 2<n>-1 repeatedly by count pulse 18, and contents of them are decoded by decoders 10 and 15. When contents of counter 9 and 14 become prescribed value (i), outputs are outputted from decoders 10 and 15, and the i-th FF 13i and data set switch 4i corresponding to this FF are selected, and the set of the set switch is read into the FF and is stored. Further, since these operations of counters continue repeatedly, data is always read in at a fixed period.
申请公布号 JPS56152328(A) 申请公布日期 1981.11.25
申请号 JP19800055675 申请日期 1980.04.23
申请人 MITSUBISHI ELECTRIC CORP 发明人 FUNADA ETSUO;HIRASAWA MOICHI
分类号 H03K19/0175;H03K19/173 主分类号 H03K19/0175
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