| 摘要 |
PURPOSE:To inexpensively obtain a solid-stage image sensor without reducing S/N and reliability by so disposing photoelectric converters on the element chips of clock wirings of positive and negative phase sides that difference of the quotient of the length of the converters in parallel with the direction of the arrangements of the converters by the distance from the chips from the sum is 2% or less. CONSTITUTION:In clock wirings of wirings on a mounting board, photoelectric converters on element chips 101 of positive phase side clock wirings 104 of phase clock wirings are so disposed that the difference (S-(-S)/0.5(S+(-S) between S=SIGMA(ei/di) and -S=SIGMA(-ei)/(-di) is 5% or less, where ei is the length of the component parallel to the direction of the arrangement of the converters on the chip 101 of positive side clock wirings 104, -ei is the length of the component parallel to the direction of the arrangement of the converters on the chip 101 of reverse phase side clock wirings 105, and -di is the distance from the chip of the section. Thus, a solid-stage image sensor can be inexpensively manufactured without reducing S/N and reliability. |
