发明名称 ANALOG/DIGITAL INDICATION ELECTRONIC CLOCK
摘要 PURPOSE:To contrive to diversify the kinds of clocks by designing so as to be able to select optionally the combination of the content shown by the indication from and an analog/digital indication part. CONSTITUTION:An optional logic is designed to control terminals CT1, CT2, CT3. Then, when an input switch SA is operated, output signals TC1, TC2, SC1, SC2 and DC generate from a control circuit 9 respectively in accordance with each specification. When the output signal TC1 is 1, the content of a time and minute clock counter 4 is supplied to an analog indicating decoder 10 through a gate circuit 7, while when an output signal TC2 is 1, said content is supplied to a digital indicating decorder 11. The content of the second counter 3 is supplied to the decoder 10 when an output signal SC1=1 and to the decoder 11 when an output signal SC2=1 through the gate circuit 6 respectively. The output signal DC is supplied to the gate circuit 8 and the content of a month, date and week day counter 5 is supplied to the decorder 11 when an output signal DC=1. By this invention, each specification is switched to a plurality of indication modes.
申请公布号 JPS56151383(A) 申请公布日期 1981.11.24
申请号 JP19800056029 申请日期 1980.04.25
申请人 SHARP KK 发明人 ODA YUKIHISA;OKABAYASHI NAONORI;YAMURA KENJI
分类号 G04G9/00;G09F9/30;G09G3/04 主分类号 G04G9/00
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