| 摘要 |
PURPOSE:To manufacture a capacity element having less irregularity due to the variation in the wafer process parameter without input voltage dependency by doping impurity in high density on the surface layer of a semiconductor region. CONSTITUTION:In a silicon gate capacitor having a p<-> type impurity region 2 surrounded by a field oxide film 4 on an n type impurity substrate 1, a gate oxide film 5 forming an insulating film and a polycrystalline silicon layer 6 forming an electrode, a region (p<+> type region) 10 doped with a p type impurity having higher density than the region 2 is formed. The region 3 is connected to VDD as the high potential side of a power source, the region 2 thus becomes VDD of the potential, and a capacity is formed between the region 2 and a polycrystalline silicon layer 6 forming a signal line. Even if the applied voltage varies at this time, a depletion layer does not form by a p<+> type region 10, thereby eliminating the voltage dependency of the capacity. |
