发明名称 TESTING METHOD FOR BIT ERROR
摘要 PURPOSE:To considerably reduce test time by integrally having four gaps which possess respectively intrinsic functions in one magnetic head and arranging these four gaps in specific position relations. CONSTITUTION:A magnetic head 31 has gaps G1-G4 providing four independent functions. Namely, G1 has the function of writing the testing signal of a specific frequency, G2 of reading the signal written by G1, G3 of writing an erase signal and G4 of reading the write signal by G3. The gaps G1-G4 exhibit the above-mentioned functions and successively execute the tests of prescribed plural steps by leaving a fixed time. With such constitution, the operation of the entire step is completed within the time of conventional one step. Hence, the test time is reduced greatly.
申请公布号 JPS56148736(A) 申请公布日期 1981.11.18
申请号 JP19800049143 申请日期 1980.04.16
申请人 FUJITSU LTD 发明人 SUENAGA TADATOSHI;MAEDA MIYOZOU
分类号 G11B5/84;G11B5/48;G11B20/18 主分类号 G11B5/84
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