| 摘要 |
PURPOSE:To improve an integration degree of the semiconductor IC device by a method wherein an electrode wiring layer is formed in a desired region in a V- groove element separation region. CONSTITUTION:An N type silicon epitaxial layer 12 and an N<+> type silicon layer 13 are formed on a P type silicon substrate 11 having a face (100) as a main surface, and in addition, an SiO2 film 14 and Si3N4 film 15 are formed in sequence on the top surface of the layers 12, 13. Then, an anisotropic etching is applied to form the V-groove 17 reaching the substrate 11 in the element separation region and after an SiO2 film 18 is formed on the internal surface of the V-groove, the V- groove is filled up with a polycrystalline silicon 19. After the substrate is plane-polished, a resist layer 21 having a conductive layer formed window 20 is formed on the top surface of the polished plane and then, a phosphorus ion P<+> is injected to form a phosphorus ion injected layer 22 in the polycrystalline silicon layer 19. Thereafter, the resist layer 21 is removed and the ion injected layer 22 is annealed to form a conductive layer 23 composed of an N<+> type silicon monocrystalline layer by radiating laser rays L. |
