| 摘要 |
PURPOSE:To reduce a pattern area by forming a high resistance element made of a polycrystalline silicon layer on an insulating film formed on a Schottky barrier junction. CONSTITUTION:After an N<+> type buried layer 22 is formed on a P-type silicon substrate 21, N<-> type single crystal silicon layers 231, 232 are formed on the whole surface, and an N<+> type diffused layer 24 is formed. Then, elements are isolated by a buried field oxide film 25, a base leading electrode 26 is formed of a polycrystalline silicon layer, P-type impurity ions are implanted, the electrode 26 is used as a diffusion source to form an external base region 27. Then, part of an insulating film on the electrode 26 on an N<-> type epitaxial layer 23<2> is opened to form Schottky metals 281, 282. Parts of the insulating film on the electrodes 281, 282 are opened, a polycrystalline silicon layer 29 is formed, boron ions are implanted to obtain a high resistance element RH1. Further, the insulating film is opened, emitter electrodes 32, 32 are formed of N<+> type polycrystalline silicon layer, wirings 31 are formed of the same N<+> type polycrystalline silicon layer, and with it as a diffusion source emitter regions 34, 34 are formed. Thus, the pattern area of a memory cell is reduced to increase its capacity. |
