| 摘要 |
PURPOSE:To grasp an error state sufficiently by continuously reading plural addresses according to a specific pattern based upon an error memory location and by storing error information including the readout data in a prescribed memory successively. CONSTITUTION:In normal operation, address ADD from a central processor is applied to address switching circuit 10, an address from which is decoded by address decoder 11 to select by memory 12 the memory location that corresponds to the address. The selectively read data is checked by error detecting circuit 13 and sent out to an external device. If an uncorrectable error is detected by circuit 13, the read data is stored in error accumulating circuit 14 and the address that corresponds to the error data is accumulated in error address accumulating circuit 15 with error ER from circuit 13. Further, a specific address from specific pattern generating circuit 16 is sent to memory 12 via circuit 10 on the basis of the address stored in circuit 15 to grasp the error state. |
