| 摘要 |
A gate driving circuit and a liquid crystal display having the same are provided to improve an image quality by preventing degradation of an image due to an RC delay in a gate line. A gate driving circuit includes a shift register(210), plural buffers, and a level shifter(220). The shift register sequentially shifts a gate shift clock from a timing controller and outputs the shifted clock signal. The buffer is formed between an N-th and N+1-th output terminals of the shift register and supplies the clock signal from the N-th output terminal to an N+1-th input terminal of the level shifter. The level shifter outputs a gate-on voltage to the N-th output line using the clock signal from an N-th output terminal of the shift register, and outputs the gate-on voltage to the N+1-th output line using the clock signal supplied to the N+1-th input terminal, so that the gate-on voltages are overlapped between the N-th and N+1-th output lines.
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