| 摘要 |
<p>A synchronous DC-to-DC converter including an inductor (L) coupled to receive an input voltage (Vin), a first transistor (3) having a source coupled to a first reference voltage (GND) and a drain coupled to the inductor, and a second transistor (11) having a source coupled to an output conductor (7) to produce an output voltage (Vout) and a drain coupled to the inductor. A feedback signal (VFB) representative of a value of the output voltage is generated, and a switch control signal (Vsw) is produced in response to the input voltage and a second reference voltage (Vref) representative of the output voltage (Vout). The second transistor (11) is turned off in response to the switch control signal (Vsw) to prevent reverse current flow through the inductor. A regulating signal (DISABLE) indicates whether or not the feedback voltage exceeds the second reference voltage, to regulate the output voltage (Vout) in a pulse-frequency modulation mode.</p> |
