| 摘要 |
PURPOSE:To make it possible to conduct an appropriate test by appropriately selecting high-speed data of DMA control and low-speed data of I/O control by providing a means of selecting high-speed bus and low-speed bus. CONSTITUTION:A testing motion by high-speed data access is read out from a memory under control of a DMA controller 102. A memory address is designated by a DMA-A-REG 109, and volume of transfer data is designated by WORD-COUN 110. Data are stored in an output buffer 108 and given to a testing board 107 by timing of a clock. Output data of the testing board are compared with determining comparative data in an input-and-output buffer 108. For a testing motion by low-speed data access, data are given to an input-and-output buffer 108 through an I/O-D-REG 111 and data selector 120 under control of an I/O bus and an input- and-output controller 106. |
