TIMING SAMPLING CIRCUIT

摘要

PURPOSE:To suppress level variation of a timing signal which is extracted from an input pulse train, by providing an auto-bias circuit on the emitter of a transistor for inputting a bipolar code reversed in phase. CONSTITUTION:Input signals of a bipolar code are reversed in phase mutual by for waveform equalized outputs, two input pulse trains are applied to the based of one pair of transistors Q1, Q2, and they conduct when a level of the input pulse hase exceeded the base - emitter voltage VBE. Collectors of the transistors Q1, Q2 are connected in common, and the output is taken out through the tank circuit which is constituted of a capacitor C10 and an inductance L10. The emitter potential of the transistors Q1, Q2 is varied in accordance with a mark rate of the input pulse train, by the auto-bias circuit consisting of a resistor R12 and a capacitor C11, and even if the mark rate of the input pulse train is varied, a variation of an output level of a timing signal from the output terminal OUT is suppressed.