发明名称 COMPARATOR CIRCUIT
摘要 PURPOSE:To realize not only a high speed but the low power consumption for a comparator circuit, by supplying alternately the working currents by the synchronous pulse for both the 1st circuit system that processes the input and output signals of a latch holding circuit and the 2nd circuit system that processes the input and output signals of a differential amplifying circuit. CONSTITUTION:The current switches 7-A, 19-A and 22-A are turned on and the current switches 8-L, 20-L and 23-L are turned off respectively when the clock pulse phi is at the H level and the clock pulse -phi is at the L level. Thus the current source 9 makes active the differential amplifying circuit consisting of the transistors 1-A and 2-A. Then an output is produced at the load resistances 3 and 4. When the clock pulses becomes contrary to each other, the switches 8-L, 20-L and 23-L are turned on. Thus the source 9 makes active the latch holding part comprising the transistors 5-L and 6-L to give a latch holding to the outputs of the resistances 3 and 4.
申请公布号 JPS56140720(A) 申请公布日期 1981.11.04
申请号 JP19800043954 申请日期 1980.04.02
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MATSUZAWA AKIRA;INOUE MICHIHIRO
分类号 H03K5/08;H03K3/2885 主分类号 H03K5/08
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