| 摘要 |
Ferroelectric power-independent memory unit has numerical buses, bit lines, support buses, amplifiers of reading and record and memory cells each of which has transistor and ferroelectric memory element that includes first electrode, second electrode and ferroelectric film between those, at that numerical buses are connected to transistors, first electrodes of memory elements through transistors are connected to bit buses, second electrodes of memory elements are combined to support buses, and bit buses are connected to registration amplifiers. The device has bit circuits for reading signal transformation, each of those has two capacitors and four switch transistors, a that each bit bus through first two switch transistors is connected to respective capacitors, those are earthed, and through second two switch transistors are connected to input of reading amplifier. |
