METHODS AND APPARATUS FOR INTERFACING BETWEEN A HOST PROCESSOR AND A COPROCESSOR

摘要

In one aspect, an interface adapted to transfer data between a host processor and an external coprocessor is provided. The interface may be adapted to operate in a plurality of write modes, wherein in a first write mode the write operation is transferred across the interface in two clock cycles and in a second write mode the write operation is transferred across the interface in a single clock cycle. In another aspect, the interface is adapted to perform a first read operation initiated by the host processor and a second read operation initiated by the external coprocessor. In another aspect, the interface includes a plurality of buffers to store read and write operations and a plurality of clock gates to selectively gate of clock signals provided to the plurality of buffers to synchronize transfer of data into and out of the buffers. In another aspect, the interface includes a selectable priority scheme capable of being modified to select between a plurality of priorities that control a preference in transferring operations over the interface when both read and write operations are queued for transfer.