| 摘要 |
<p>An analog-to-digital converter of the type including a sample-and-hold circuit for sampling an analog signal during predetermined cycles to produce periodically sampled voltages, a source of reference voltages for supplying plural quantizing voltages having a quantizing voltage step DELTA V, a plurality of voltage comparators for receiving each sampled voltage and the plural quantizing voltages to compare the sampled voltage to respective ones of the quantizing voltage for determining the level of the sampled voltage relative to the quantizing voltages, and an encoder responsive to the voltage comparators to produce a plural-bit code as a function of the determined sampled voltage level. The analog-to-digital converter includes the improvement comprised of an offset supply operative to shift either the sampled voltage level or the quantizing voltages by an offset amount during each sampling cycle, a detector coupled to receive the least significant bit in the plural-bit code produced by the encoder for detecting whether this least significant bit changes in response to the operation of the offset voltage source, and an output circuit for deriving an output digital signal formed of the plural-bit code produced by the encoder and an additional bit derived from the detector.</p> |
