发明名称 BUFFER MEMORY DEVICE
摘要 PURPOSE:To reduce the readout time, by storing the correspondent channel control block in the designated address location of the buffer memory with one access, in the channel making data input/output control between the peripheral device and the main memory. CONSTITUTION:When the correspondent channel block CCB is read out from the main memory, the read out CCB control information word is entried in the data register 25, then it is held to the registers 32-41 sequentially. Further, the control information word constituting CCB is stored all in the registers 32-41, the device number of peripheral device giving service request is set to the address register 42, and CCB corresponding with one access is stored in the address location designated with the buffer memory 31. Thus, the readout time of buffer memory can remarkably be reduced without increasing the hardware.
申请公布号 JPS56137424(A) 申请公布日期 1981.10.27
申请号 JP19800039418 申请日期 1980.03.27
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 SATOU KAZUYUKI
分类号 G06F13/28;G06F12/08;G06F13/12 主分类号 G06F13/28
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