发明名称 CLOCK SWITCHING SYSTEM FOR DUPLEX DATA PROCESSOR
摘要 PURPOSE:To prevent the destruction of data, by making switching after waiting for the end of one operation under way in the main storage device, when the switching of system is made from one to another due to the production of error. CONSTITUTION:In the data processor 0 system in use, the operation like prescribed write-in, readout and rewrite-in is made with the instruction from CPU1 by the main storage device 2. If an error takes place to the device 2 due to any cause during data processing, and the read out data cannot be guaranteed, the emergent detection signal is delivered from the emergency operating device 4 to the emergency operating device 4' of the waiting 0 system. Further, when the main storage device 2' does not make read in and write-in, the device 4' controls the switching circuit 5' and supplies the clock CLKO from the clock source 6 of the 0 system to CPU1' to read out required data. When the device 2' reads in or writes in, switching is made after waiting for the end of one operation under way.
申请公布号 JPS56137418(A) 申请公布日期 1981.10.27
申请号 JP19800040777 申请日期 1980.03.28
申请人 FUJITSU LTD 发明人 IGI YOUZOU;KUROSU HIROHIKO;IZAWA EIICHI
分类号 G06F1/04;G06F11/20 主分类号 G06F1/04
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